? semiconductor components industries, llc, 2006 july, 2006 ? rev. 4 1 publication order number: SN74LS541/d SN74LS541 octal buffer/line driver with 3?state outputs the SN74LS541 is an octal buffer and line driver with the same functions as the ls241, but with pinouts on the opposite side of the package. this device type is designed to be used as a memory address driver, clock driver and bus-oriented transmitter / receiver. this device is especially useful as output ports for the microprocessors, allowing ease of layout and greater pc board density. ? hysteresis at inputs to improve noise margin ? pnp inputs reduce loading ? 3-state outputs drive bus lines ? inputs and outputs opposite side of package, allowing easier interface to microprocessors ? input clamp diodes limit high-speed termination effects logic and connection diagram dip (top view) 18 17 16 15 14 13 1234 56 7 20 19 8 v cc 910 gnd 12 11 guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 4.75 5.0 5.25 v t a operating ambient temperature range 0 25 70 c i oh output current ? high ? 15 ma i ol output current ? low 24 ma http://onsemi.com low power schottky device package shipping ordering information SN74LS541n pdip ? 20 1440 units/box SN74LS541dw soic ? wide 38 units/rail pdip ? 20 n suffix case 738 20 1 20 1 a = assembly location wl = wafer lot y, yy = year ww = work week SN74LS541n awlyyww marking diagrams ls541 awlyyww soic ? 20 dw suffix case 751d 1 1 SN74LS541dwr2 soic ? wide 2500/tape & reel 20 1 soeiaj ? 20 m suffix case 967 74ls541 awlyww SN74LS541m see note 1 soeiaj ? 20 SN74LS541mel see note 1 soeiaj ? 20 1. for ordering information on the eiaj version of the soic package, please contact your local on semiconductor representative. 1
SN74LS541 http://onsemi.com 2 block diagram e 1 e 2 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 8 y8 y7 y6 y5 y4 y3 y2 y1 (1) (19) (2) (3) (4) (5) (6) (7) (8) (9) (11) (12) (13) (14) (15) (16) (17) (18) inputs outputs e 1 l h x l e 2 l x h l d h x x l ls540 l z z h ls541 h z z l l = low voltage level h = high voltage level x = immaterial z = high impedance dc characteristics over operating temperature range (unless otherwise specified) symbol parameter limits unit test conditions min typ max v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 0.8 v guaranteed input low voltage for all inputs v ik input clamp diode voltage ? 0.65 ? 1.5 v v cc = min, i in = ? 18 ma v oh output high voltage 2.4 3.4 v v cc = min, i oh = ? 3.0 ma 2.0 v v cc = min, i oh = max, v il = 0.5 v v ol output low voltage 0.25 0.4 v i ol = 12 ma v cc = v cc min, v in = v il or v ih per truth table 0.35 0.5 v i ol = 24 ma v t+ ? v t ? hysteresis 0.2 0.4 v v cc = min i ozh output off current high 20 a v cc = max, v out = 2.7 v i ozl output off current low ? 20 a v cc = max, v out = 0.4 v i ih input high current 20 a v cc = max, v in = 2.7 v 0.1 ma v cc = max, v in = 7.0 v i il input low current ? 0.2 ma v cc = max, v in = 0.4 v i os short circuit current (note 1) ? 40 ? 225 ma v cc = max i cc power supply current total, output high 32 ma v cc = max total, output low 52 ma total output 3-state 55 ma 1. not more than one output should be shorted at a time, nor for more than 1 second.
SN74LS541 http://onsemi.com 3 ac characteristics (t a = 25 c) symbol parameter limits unit test conditions min typ max t plh propagation delay, data to output 12 15 ns v cc = 5.0 v c l = 45 pf r l = 667 t phl 12 18 t pzh output enable time to high level 15 32 ns t pzl output enable time to low level 20 38 ns t phz output disable time to high level 10 18 ns c l = 5.0 pf t plz output disable time to low level 15 29 ns ac waveforms 1.5 v 1.5 v 1.5 v 1.3 v 1.3 v 1.3 v 1.3 v v in v out t plh t phl 1.3 v 1.3 v v in v out sw2 c l * 5 k sw1 v cc r l to output under test 1.3 v t plh t phl v e v e v out v e v e v out t phz 1.5 v 1.5 v t pzl t plz v ol 1.5 v v oh 0.5 v t pzh 1.3 v figure 1. figure 2. figure 3. figure 4. figure 5. 1.5 v 0.5 v 1.5 v switch positions closed open closed closed open closed closed closed t pzh t pzl t plz t phz sw2 sw1 symbol
SN74LS541 http://onsemi.com 4 package dimensions n suffix plastic package case 738 ? 03 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 ? a ? seating plane k n f g d 20 pl ? t ? m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc
SN74LS541 http://onsemi.com 5 package dimensions d suffix plastic soic package case 751d ? 05 issue f 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
SN74LS541 http://onsemi.com 6 package dimensions m suffix soeiaj package case 967 ? 01 issue o dim min max min max inches ??? 2.05 ??? 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 ??? 0.81 ??? 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 SN74LS541/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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